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Re: [tcf-dev] Disassembly with variable length instructions and data interleaved with code

Hi Anders,

 

Without symbols it gets complicated.

 

In theory, one can write a program, which reads and decodes memory contents to find all instructions reachable from a certain starting point.

It would be somewhat similar to how stack crawl logic works.

Starting point can be current PC. Everything not reachable can be assumed to be data.

I’m not aware of a good example of such program.

 

Regards,

Eugene

 

From: tcf-dev-bounces@xxxxxxxxxxx [mailto:tcf-dev-bounces@xxxxxxxxxxx] On Behalf Of Conradi, Anders
Sent: Tuesday, February 6, 2018 11:42 PM
To: TCF Development <tcf-dev@xxxxxxxxxxx>
Subject: Re: [tcf-dev] Disassembly with variable length instructions and data interleaved with code

 

Thanks Eugene,

 

So do you have any tips on how to get the ISA for plain bytes in memory? There is no symbol information available and the code looks like

 

jmp L

.word 0x4711

L:             <more code>

 

The data looks just like an instruction. I don’t really see a way to see the ISA. What I at least want to do is to give proper disassembly for the code at L, when the instruction pointer points at L.

 

// Anders

 

From: tcf-dev-bounces@xxxxxxxxxxx [mailto:tcf-dev-bounces@xxxxxxxxxxx] On Behalf Of Eugene Tarassov
Sent: Tuesday, February 6, 2018 19:51
To: TCF Development <tcf-dev@xxxxxxxxxxx>
Subject: Re: [tcf-dev] Disassembly with variable length instructions and data interleaved with code

 

Hi Anders,

 

The Disassembly service relies on context_get_isa() function to return content type for a memory address. For example, for ARM it checks for special ELF symbols “$a” and “$d” to distinguish between instructions and data, and returns either “ARM” or “Data” as ISA name. This is the right way to handle data interleaved with the code.

 

You, probably, have implemented your own version of the function, so you might need to improve it.

 

Regards,

Eugene

 

From: tcf-dev-bounces@xxxxxxxxxxx [mailto:tcf-dev-bounces@xxxxxxxxxxx] On Behalf Of Conradi, Anders
Sent: Tuesday, February 6, 2018 6:23 AM
To: tcf-dev@xxxxxxxxxxx
Subject: [tcf-dev] Disassembly with variable length instructions and data interleaved with code

 

Hi,

 

We have a TCF based debugger and we run into some issues when we encounter x86 code with data interleaved with the code. The data is interpreted as code, which then causes all further disassembly to be misaligned with what will actually run. Even when I step in the code the disassembly is not refreshed to at least align the disassembly at the instruction register. I don’t even see any request for new disassembly from Eclipse, even though I have tried to tell Eclipse all memory have changed (I did not find any event to tell Eclipse that the disassembly is invalid). Right now I’m wondering how this is supposed to work. We have a semi-custom target agent and I want to figure out what it needs to do to get Eclipse to show proper disassembly, or if there is any way in the GUI to ask Eclipse to disassemble at a particular address.

 

-        How is a target supposed to tell Eclipse that the disassembly should be invalidated and that Eclipse should re-ask for disassembly?

-        Can the user tell Eclipse to disassemble from a particular address, and thus cause Eclipse to re-ask the target for disassembly from a given start address?

 

// Anders

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Registered Office: Isafjordsgatan 30B, 164 40 Kista, Stockholm, Sweden
Registration Number: 556189-6027

This e-mail and any attachments may contain confidential material for
the sole use of the intended recipient(s). Any review or distribution
by others is strictly prohibited. If you are not the intended
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