Skip to main content

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [List Home]
[tcf-dev] Disassembly with variable length instructions and data interleaved with code

Hi,

 

We have a TCF based debugger and we run into some issues when we encounter x86 code with data interleaved with the code. The data is interpreted as code, which then causes all further disassembly to be misaligned with what will actually run. Even when I step in the code the disassembly is not refreshed to at least align the disassembly at the instruction register. I don’t even see any request for new disassembly from Eclipse, even though I have tried to tell Eclipse all memory have changed (I did not find any event to tell Eclipse that the disassembly is invalid). Right now I’m wondering how this is supposed to work. We have a semi-custom target agent and I want to figure out what it needs to do to get Eclipse to show proper disassembly, or if there is any way in the GUI to ask Eclipse to disassemble at a particular address.

 

-          How is a target supposed to tell Eclipse that the disassembly should be invalidated and that Eclipse should re-ask for disassembly?

-          Can the user tell Eclipse to disassemble from a particular address, and thus cause Eclipse to re-ask the target for disassembly from a given start address?

 

// Anders

----------------------------------------------------------------------
Intel Sweden AB
Registered Office: Isafjordsgatan 30B, 164 40 Kista, Stockholm, Sweden
Registration Number: 556189-6027

This e-mail and any attachments may contain confidential material for
the sole use of the intended recipient(s). Any review or distribution
by others is strictly prohibited. If you are not the intended
recipient, please contact the sender and delete all copies.


Back to the top