| [cdt-dev] Memory view and monitor |
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Hi,
When I use the memory view and try to access our embedded HW target, I run into issues. Usually, it's trying to byte read block which is 32-bit aligned and meant for 32-bit accesses. Sometimes it goes into regions which are not implemented and causing exception
on the target. And when there is peripheral and there are side effects attached with a read it might not just trigger them, but trigger them more often than expected (as one 32-bit register will be read as four 8-bits).
I'm wondering is there a cheap/easy trick to at least force it to 32-bit mode and maybe limit range which will be allowed to access?
I know the read/writes with side effects can be addressed with SVD, which could be great solution for a lot of cases if there would be an option to dictate the bus width accesses and they wouldn't be proxied to 8-bits all the time.
I'm worried that there is no such settings, so probably we should implement this feature and try to upstream it to the CDT. Then there is a follow-up question, what would be the best way to approach this? It needs to be vendor-neutral, what works for us might
be no good for others, so hard coding 32-bit accesses is bad. There needs to be a description of region blocks, what is their alignment/data-width, valid address range, some global access privilege (read-only for roms etc...) and then maybe use it with SVD
to give finer detail. Maybe the whole region is unimplemented and non-accessible, except few peripherals etc... Should the memory view have a schema similar to SVD to describe this target properties so then it would know how to correctly access given addresses?
Probably basic functionality first and then later more detailed/finer/edge-case features.
And we do not want to make own forks, so I'm trying to figure out what it would have to do/contain and do to be upstremable and if anybody has ideas what would be a nice user friendly and easy way to achieve this for everybody?
Best regards,
Anton
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