Hello OpenHW Group Members,
Please see below for a few reminders and marketing opportunity updates from the OpenHW Group.
Monthly Marketing Working Group (MWG) Meetings
As a reminder, we have monthly member
marketing meetings (say that five times fast!) for updates on the fourth
Tuesday of every month. Marketing representatives should reach out to be added to our mailing list, and once added they will be invited to these monthly meetings.
Our next MWG meeting is scheduled for Tuesday, February 22 at 8:00 AM PDT/11:00 AM EDT
Please find the slide deck from the January 2024 MWG meeting
New Members:
Please welcome RedHat, Cirrus Logic and Technology Innovation Institute (TII) to OpenHW Group. We are excited to have them join our group and participate in numerous projects.
Conferences/Tradeshows:
OpenHW will be at the Tristan working Group
On Feb 6,
will be the EU Tristan Project Meeting for Tristan Members and OpenHW will participate as we are hostign the Cores used in Tristan
OpenSource Policyu Forum: https://summit.openforumeurope.org/
Fosdem: https://fosdem.org/2024/
Tristan: https://github.com/openhwgroup/tristan-unified-access-page
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April Embedded World (9.-11.Apr '24)
OpenHW will be at the Embedded World 2024 in Nuremberg, Germany. We will have a kiosk at the Eclipse Foundation booth and we will host a track with OpenHW RISC-V related talks. Flo will be around to conduct
interviews with OpenHW Group members in a light relaxed “recap” manner. If you want to schedule an interview please let us know.
It would be nice to have you speaking about why you are a OpenHW member and how we work together
Social Media Through OpenHW Group:
As a member, you have the ability to reach out to our followers on Twitter and LinkedIn!
Make sure that you’ve followed us on social platforms and encourage others to, as well!
Please use our social
media form for submitting social media requests. We ask that you submit your social media for posting
at least one week prior to the requested posting date. All posts must abide by our social
media guidelines.
When posting on social media regarding current OpenHW Group projects, or related topics, please use the following:
@openhwgroup; @riscv; #opensource; #corev; #riscv; #openhwgroup
Monthly Blogs:
Our monthly OpenHW Group newsletters are distributed to over 1,500 (and growing) opt-in subscribers. We ask each member to submit a blog that will
be posted on the OpenHW website, promoted on social media and featured in our monthly newsletters. Blog
guidelines can be found here, and blogs should be submitted to michelle@xxxxxxxxxxxxxxx.
OpenHW TV – Season 5:
OpenHW TV will be running our RISC-V North American Summit presentation videos for the next few months.
First up, 10xEngineers CEO Bilal
Zafar gives an insightful presentation on integrating RISC-V cores into your designs. Learn more about what open source can bring to your #SoC, and the
tradeoffs that come when integrating RISC-V. Watch now to see Bilal explain the goals of the CVA6 project
https://www.youtube.com/watch?v=yBHFEqBiKgE
Update on Projects:
CVA6-Platform:
The CVA6-Platform project, under the leadership of Professor Jonathan Balkind at UCSB and the team at RedHat which has just joined OpenHW, seeks to provide an FPGA-based, vendor neutral software development and
regression platform for RISC-V. The key OpenHW technologies featured include the CVA6 processor core and the CV-MESH NoC. We are aiming to bring up this service on AWS F1 instances with Fedora. The project is still in bootstrap mode and there are major opportunities
for OpenHW Members to get involved. Some of the topics that need to be covered in an upcoming Project Launch plan are
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CVA6 configurations and platform engineering
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Software/Linux configurations
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Prototype instantiations and overall schedule
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Overall deployment model of CVA6-platform
If you’d like to get involved in this work - please get in touch with Jonathan or OpenHW Staff.
Polara Development Board - Great Progress.
The team at Polytechnique Montréal led by François Leduc-Primeau, Yvon Savaria and
Jean-Pierre David, in close collaboration with ETH Zurich, CMC Microsystems, Rumble Development, and UCSB, have made great progress on the Polara test chip and a
Development Board to support testing and software development. Congratulations to the entire team for this great progress!
This work started as the
CV-VEC project to design a vector-coprocessor compliant with RISC-V Vector Extension V1.0. The Polara chip, optimized for quantized deep learning and vision applications, incorporates 4 lanes of CVA6+CV-VEC plus CV-MESH fabric. Polara has been
taped-out in December 2023, and will be manufactured at Global Foundries on a 22FDX shuttle with parts anticipated in May 2024.
The Development Board includes an FPGA-based “Chipset” together with the Polara chip mounted on a daughter card. The Dev Board has passed the OpenHW “Project Launch” gate. OpenHW members who are interested in
obtaining one of a very limited number of Development Bards to help drive testing of Polara should get in touch with OpenHW staff
Thank you for your valued membership and please let us know if you have any questions or suggestions for the OpenHW Group marketing activities.
Best Regards,
--
Michelle Clancy Fuller
Director of Marketing
OpenHW Group
www.openhwgroup.org