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Re: [threadx-dev] SMP porting question
  • From: Bill Lamie <blamie@xxxxxxxxxxx>
  • Date: Tue, 2 Sep 2025 21:14:50 +0000
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  • Thread-topic: SMP porting question

Hi Peter,

 

With ThreadX SMP ports, we typically maintain a “ready” bit in the TX_THREAD (thread control block) to indicate that the thread is no longer running and is ready for scheduling again.  This bit would be set when the thread is created, cleared when it is actually scheduled in _tx_thread_schedule and then set again when the thread voluntarily returns or is preempted (_tx_thread_system_return and _tx_thread_context_restore).

 

Best regards,

 

Bill

 

BTW, I hope this helps. Please feel free to reach out to me at blamie@xxxxxxxxxxx.

 

 

From: threadx-dev <threadx-dev-bounces@xxxxxxxxxxx> On Behalf Of Peter.McShane--- via threadx-dev
Sent: Sunday, August 31, 2025 7:41 AM
To: threadx-dev@xxxxxxxxxxx
Cc: Peter.McShane@xxxxxxxxxxxxx
Subject: [threadx-dev] SMP porting question

 

Hi,

 

I'm currently working on porting ThreadX to Risc-V 64 bit with SMP support and have been looking at the existing SMP ports to guide me.  

 

Whilst looking at some of the Arm SMP ports, I've been trying to make sense of some code in the tx_thread_schedule.s file for example in the cortex_a77_smp/gnu directory. 

 

Within this code there is a reference to a ready bit which is a 32 bit word at offset 280 in the TX_THREAD structure and another at offset 260. I'm not sure exactly which entries in the structure these refer to and was wondering if someone could provide a definitive answer.

 

Regards,

Peter Mc Shane 

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