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incorrect code generation for configuration.c file [message #1741831]

Tue, 30 August 2016 02:04

James Lockwood

Messages: 43
Registered: July 2009

Member

I am creating an Adc driver. Here is the relevant .xdc portion

    enum ClockSource_ {    // ADCCC register
        ClockSource_SYSCLK_And_ClockDivider = 0,  /*! SYSCLK And ClockDivider */
        ClockSource_ALTCLK = 1,                   /*! ALTCLK - Alternate Clock (16Mhz) */
        ClockSource_MOSC = 2                      /*! MOSC - Master Oscillator */
    };
    
    enum HardwareAveraging_ {
        HardwareAveraging_None = 0x0,
        HardwareAveraging_2x   = 0x1,
        HardwareAveraging_4x   = 0x2,
        HardwareAveraging_8x   = 0x3,
        HardwareAveraging_16x  = 0x4,
        HardwareAveraging_32x  = 0x5,
        HardwareAveraging_64x  = 0x6
    };
    
    enum VoltageReference_ {
        VoltageReference_VDDA_GNDA,
        VoltageReference_VREFA_GNDA
    };
    
    struct SequencerInfo_ {
        UInt8              maxPositions;
        UInt32             interruptNumber;
        IInterrupts.IsrFxn isrFxn;
        UInt               priority;   // 0 = lowest priority, 3 = highest priority
    };
    
    struct AdcModuleInfo_ {
        VoltageReference_  voltageReference;      // ADCCTL_VREF
        ClockSource_       clockSource;           // ADCCC_CS
        UInt8              clockDivider;          // ADCCC_CLKDIV
        UInt8              samplingLagInClocks;   // ADC_ADCSPC_PHASE
        HardwareAveraging_ hardwareAveraging;     // ADC_ADCSAC_AVG
        UInt32             baseRegisterAddress;
        SequencerInfo_     sequencerInfo[length];
    };

    config AdcModuleInfo_ AdcModuleInfo[length];   // variable length.  one entry for each module.

My configuration file:

Adc = xdc.useModule('trust.drivers.ti.tm4c1294ncpdt.Adc');

Adc.AdcModuleInfo = 
    [
        {   // Module 0
            voltageReference:    Adc.VoltageReference_VDDA_GNDA,
            clockSource:         Adc.ClockSource_SYSCLK_And_ClockDivider,
            clockDivider:        1,
            samplingLagInClocks: 0,   // this affects the ADCSPC register to provide phase control
            hardwareAveraging:   Adc.HardwareAveraging_None,  // this affects the ADCSAC register
            baseRegisterAddress: 0x40038000,
            // sequencer settings (sequencer #0, 1, 2, 3)
            sequencerInfo: [
                        {   // Sequencer 0
                            maxPositions:    8,
                            interruptNumber: 14,
                            isrFxn:          Adc.module0Sequencer0IsrFxn,
                            priority:        0
                        },
                        {   // Sequencer 1
                            maxPositions:    4,
                            interruptNumber: 15,
                            isrFxn:          Adc.module0Sequencer1IsrFxn,
                            priority:        1 
                        },
                        {   // Sequencer 2
                            maxPositions:    4,
                            interruptNumber: 16,
                            isrFxn:          Adc.module0Sequencer2IsrFxn,
                            priority:        2 
                        },                                  
                        {   // Sequencer 3
                            maxPositions:    1,
                            interruptNumber: 17,
                            isrFxn:          Adc.module0Sequencer3IsrFxn,
                            priority:        3 
                        },
                        ],
        },
        {   // Module 1
            voltageReference:    Adc.VoltageReference_VDDA_GNDA,
            clockSource:         Adc.ClockSource_SYSCLK_And_ClockDivider,
            clockDivider:        1,
            samplingLagInClocks: 0,   // this affects the ADCSPC register to provide phase control
            hardwareAveraging:   Adc.HardwareAveraging_None,  // this affects the ADCSAC register
            baseRegisterAddress: 0x40039000,
            sequencerInfo: [
                        {   // Sequencer 0
                            maxPositions:    8,
                            interruptNumber: 46,
                            isrFxn:          Adc.module1Sequencer0IsrFxn,
                            priority:        0
                        },
                        {   // Sequencer 1
                            maxPositions:    4,
                            interruptNumber: 47,
                            isrFxn:          Adc.module1Sequencer1IsrFxn,
                            priority:        1 
                        },
                        {   // Sequencer 2
                            maxPositions:    4,
                            interruptNumber: 48,
                            isrFxn:          Adc.module1Sequencer2IsrFxn,
                            priority:        2 
                        },                                  
                        {   // Sequencer 3
                            maxPositions:    1,
                            interruptNumber: 49,
                            isrFxn:          Adc.module1Sequencer3IsrFxn,
                            priority:        3 
                        },
                        ],
        }
    ];

Here is the generated code which is incorrect:

/* --> trust_drivers_ti_tm4c1294ncpdt_Adc_AdcModuleInfo_0_sequencerInfo__A */
const __T1_trust_drivers_ti_tm4c1294ncpdt_Adc__0sequencerInfo trust_drivers_ti_tm4c1294ncpdt_Adc_AdcModuleInfo_0_sequencerInfo__A[] __attribute__ ((section (".rodata_trust_drivers_ti_tm4c1294ncpdt_Adc_AdcModuleInfo_0_sequencerInfo__A")));
const __T1_trust_drivers_ti_tm4c1294ncpdt_Adc__0sequencerInfo trust_drivers_ti_tm4c1294ncpdt_Adc_AdcModuleInfo_0_sequencerInfo__A[4] = {
    {
        (xdc_UInt8)0x8,  /* maxPositions */
        (xdc_UInt32)0xe,  /* interruptNumber */
        ((xdc_Void(*)(xdc_Void))((xdc_Fxn)trust_drivers_ti_tm4c1294ncpdt_Adc_module0Sequencer0IsrFxn__I)),  /* isrFxn */
        (xdc_UInt)0x0,  /* priority */
    },  /* [0] */
    {
        (xdc_UInt8)0x4,  /* maxPositions */
        (xdc_UInt32)0xf,  /* interruptNumber */
        ((xdc_Void(*)(xdc_Void))((xdc_Fxn)trust_drivers_ti_tm4c1294ncpdt_Adc_module0Sequencer1IsrFxn__I)),  /* isrFxn */
        (xdc_UInt)0x1,  /* priority */
    },  /* [1] */
    {
        (xdc_UInt8)0x4,  /* maxPositions */
        (xdc_UInt32)0x10,  /* interruptNumber */
        ((xdc_Void(*)(xdc_Void))((xdc_Fxn)trust_drivers_ti_tm4c1294ncpdt_Adc_module0Sequencer2IsrFxn__I)),  /* isrFxn */
        (xdc_UInt)0x2,  /* priority */
    },  /* [2] */
    {
        (xdc_UInt8)0x1,  /* maxPositions */
        (xdc_UInt32)0x11,  /* interruptNumber */
        ((xdc_Void(*)(xdc_Void))((xdc_Fxn)trust_drivers_ti_tm4c1294ncpdt_Adc_module0Sequencer3IsrFxn__I)),  /* isrFxn */
        (xdc_UInt)0x3,  /* priority */
    },  /* [3] */
};

/* --> trust_drivers_ti_tm4c1294ncpdt_Adc_AdcModuleInfo_1_sequencerInfo__A */
const __T1_trust_drivers_ti_tm4c1294ncpdt_Adc__1sequencerInfo trust_drivers_ti_tm4c1294ncpdt_Adc_AdcModuleInfo_1_sequencerInfo__A[] __attribute__ ((section (".rodata_trust_drivers_ti_tm4c1294ncpdt_Adc_AdcModuleInfo_1_sequencerInfo__A")));
const __T1_trust_drivers_ti_tm4c1294ncpdt_Adc__1sequencerInfo trust_drivers_ti_tm4c1294ncpdt_Adc_AdcModuleInfo_1_sequencerInfo__A[4] = {
    {
        (xdc_UInt8)0x8,  /* maxPositions */
        (xdc_UInt32)0x2e,  /* interruptNumber */
        ((xdc_Void(*)(xdc_Void))((xdc_Fxn)trust_drivers_ti_tm4c1294ncpdt_Adc_module1Sequencer0IsrFxn__I)),  /* isrFxn */
        (xdc_UInt)0x0,  /* priority */
    },  /* [0] */
    {
        (xdc_UInt8)0x4,  /* maxPositions */
        (xdc_UInt32)0x2f,  /* interruptNumber */
        ((xdc_Void(*)(xdc_Void))((xdc_Fxn)trust_drivers_ti_tm4c1294ncpdt_Adc_module1Sequencer1IsrFxn__I)),  /* isrFxn */
        (xdc_UInt)0x1,  /* priority */
    },  /* [1] */
    {
        (xdc_UInt8)0x4,  /* maxPositions */
        (xdc_UInt32)0x30,  /* interruptNumber */
        ((xdc_Void(*)(xdc_Void))((xdc_Fxn)trust_drivers_ti_tm4c1294ncpdt_Adc_module1Sequencer2IsrFxn__I)),  /* isrFxn */
        (xdc_UInt)0x2,  /* priority */
    },  /* [2] */
    {
        (xdc_UInt8)0x1,  /* maxPositions */
        (xdc_UInt32)0x31,  /* interruptNumber */
        ((xdc_Void(*)(xdc_Void))((xdc_Fxn)trust_drivers_ti_tm4c1294ncpdt_Adc_module1Sequencer3IsrFxn__I)),  /* isrFxn */
        (xdc_UInt)0x3,  /* priority */
    },  /* [3] */
};

I can 'hack' it and make it compile by placing this in my Adc__epilogue.

#define __T1_trust_drivers_ti_tm4c1294ncpdt_Adc__0sequencerInfo trust_drivers_ti_tm4c1294ncpdt_Adc_SequencerInfo_
#define __T1_trust_drivers_ti_tm4c1294ncpdt_Adc__1sequencerInfo trust_drivers_ti_tm4c1294ncpdt_Adc_SequencerInfo_

I seem to recall reporting something very similar awhile back which got fixed in subsequent releases of XDCTools. It was the same type of thing, but it affected the Module_State structure.

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Re: incorrect code generation for configuration.c file [message #1741932 is a reply to message #1741831]

Tue, 30 August 2016 16:32

Sasha Slijepcevic

Messages: 115
Registered: July 2009

Senior Member

James,
I'll look into it but can you let me know which version of XDCtools are you using?

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Re: incorrect code generation for configuration.c file [message #1741950 is a reply to message #1741932]

Tue, 30 August 2016 18:05

James Lockwood

Messages: 43
Registered: July 2009

Member

xdctools_3_32_00_0_06

I know there is one more newer, but looked at the release notes, and didn't see anything related to this, so I haven't tried it.

Do you want me to?

Thanks.

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