 How to import existing C source code and makefile [message #1062097] |
Wed, 05 June 2013 23:38 |
 Robert Lockwood
Messages: 45
Registered: October 2010
Location: Riverside, CA, USA |
Member |
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Ubuntu 12.04 & Juno
I have some open source code from a vendor's instalaltiion that demos their API. I copied the folder with the specific code for the program, changed permissions etc., edited the makefile from relative paths to absolute paths for some global include files, and ran make. It worked and the resulting program works.
I then created a new workspace for this project and have tried several methods of cerating/imporinting the source code. The code is imported but the include files external to the source folder are not being processed.
I had thought that the makefile would have been parsed to generate whatever paths the project needed. I've tried to add the paths by hand but to no avail. For a successful build at least one external library (.so?) needs to be identified.
How do I remedy this? This is my first experience with CDT and my experience with make files not extensive and is from years ago.
TIA
Here's the makefile.
# $Id: makefile.linux,v 1.6 2010-10-25 14:10:16 gertjan Exp $
# ARVOO Imaging Products BV
# Linux makefile orlc_cl Orlando CL sample application
# modified for use on maroon 6 June 2013 RN Lockwood
OBJDIR = .
BINDIR = .
# ARVDRV_INCLUDE= ../../include
ARVDRV_INCLUDE= /opt/arvoo/include
# ORLIB_INCLUDE= ../include
ORLIB_INCLUDE= /opt/arvoo/orlando/include
INCLUDE_PATH = -I$(ARVDRV_INCLUDE) -I$(ORLIB_INCLUDE)
CFLAGS = -D_LINUX -Wall -g $(INCLUDE_PATH)
LINKCFLAGS = -D_LINUX -g -L/usr/lib
# if static libraries are needed, uncomment next line:
# LINKCFLAGS += -static
TARGETNAME = orlc_cl
TARGET = $(BINDIR)/$(TARGETNAME)
LIBNAME = orlnd
# the sources to build the target from
SOURCES = main.c orl_dll.c orlcapt.c orlinterr.c orlio.c orlmain.c\
orlmenu.c orlser.c orltimer.c
OBJECTS = $(SOURCES:%.c=$(OBJDIR)/%.o)
DEPENDENCIES = $(SOURCES:.c=.d)
all: $(DOREMOVECR) .depend $(BINDIR) $(OBJDIR) $(TARGET)
$(BINDIR) $(OBJDIR):
mkdir -p $@
#link the object files to one
$(TARGET): $(OBJECTS)
@echo linking $@ from $<
@$(CC) $(LINKCFLAGS) -o $@ $(OBJECTS) -l$(LIBNAME) -larvdrv -lpthread -lc -lrt
.SUFFIXES:
$(OBJDIR)/%.o: %.c
@echo compiling $<
@$(CC) $(CFLAGS) -c -o $@ $<
depend .depend dep: makefile.linux
@$(CC) $(CFLAGS) -M *.c > $@
ifeq (.depend,$(wildcard .depend))
include .depend
endif
clean:
@rm -f $(TARGET) $(OBJECTS) .depend
#deze opdracht verwijderd de CR's van alle files die gewijzigd zijn
removcr: makefile.linux *.c *.h
@echo remove cr from $?
@./RemoveCR $?
@touch removcr
[Updated on: Thu, 06 June 2013 19:25] Report message to a moderator |
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