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Re: Grammer Help Needed [message #1705539 is a reply to message #1705534] |
Mon, 17 August 2015 08:41  |
Eclipse User |
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The problem is with the "sv_logic_in_port rule". Through this rule, "sv_in_port" is put in two inheritance hierarchies that both have a feature called "name": "sv_port" and "sv_logic_in_port". By rewriting the rule to
sv_logic_or_port:
sv_logic | sv_port;
You get a consistent hierarchy, pulling the "name" up above both "sv_logic" and "sv_port".
I understand that you originally came up with this rule to only allow logic or input ports at certain places. But instead of trying to put that constraint into the grammar, you can have a validation that checks the correctness of the model.
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