Eclipse Community Forums: C / C++ IDE (CDT) » defining a macros in makefile and using those macros in c file

Help

Home

Home » Language IDEs » C / C++ IDE (CDT) » defining a macros in makefile and using those macros in c file

Show: Today's Messages :: Show Polls :: Message Navigator

defining a macros in makefile and using those macros in c file [message #1429452]

Tue, 23 September 2014 08:46

usha cy

Messages: 1
Registered: September 2014

Junior Member

Hi am new to these makefiles, i have to access a macro defined in makefile to other .c files in my project.
I have tried it by doinf CFLAGS -D option but it is compile time, so i dont want this method.
Please anyone let me know is there any method to use macros defined in makefile to other .c files.

eg: in makefile
CFLAGS += -D ADC_MODULE=1
and using in .c file as #ifdef ADC_MODULE
/* code */
#endif
like this i need other way of doing the same.
Please help me in this.

Report message to a moderator

Re: defining a macros in makefile and using those macros in c file [message #1429820 is a reply to message #1429452]

Tue, 23 September 2014 20:13

Tauno Voipio

Messages: 742
Registered: August 2014

Senior Member

The macros are expanded at compile time, by the C preprocessor.

The usual way to use common macros in C code is to define them in header files (.h) and using the #include directive for the header file in all C sources wanting to use them.

The Make program and makefiles are explained in the GNU Make Manual, <http://www.gnu.org/software/make/manual/>.

--

Tauno Voipio

Report message to a moderator

Previous Topic:	Eclipse Debug parameters vs Qt Creator parameters
Next Topic:	C CODE GENERATION FROM STMubeMX

Goto Forum:

-=] Back to Top [=-

[ Syndicate this forum (XML) ] [

]

Current Time: Tue Apr 23 10:30:20 GMT 2024

.:: Contact :: Home ::.

Breadcrumbs

Sign up to our Newsletter