RIGOLETTO

RIGOLETTO aims to create a complete, open RISC-V–based hardware platform that European chipmakers, Tier-1 suppliers and OEMs can share and extend. The project will deliver industrial-grade intellectual-property blocks—processor cores, AI/ML accelerators, interconnects, memory hierarchies and peripheral subsystems—covering a spectrum of performance points suitable for both DCUs and ZCUs in electrified, automated and connected vehicles.

By building on the momentum of the open-source RISC-V ISA and coordinating standardisation across Europe, RIGOLETTO aims to prevent ecosystem fragmentation, speed innovation and reinforce the EU Chips Joint Undertaking goal of technological sovereignty. A collaboratively developed reference-platform approach will guide partners toward interoperable, safety-certifiable solutions, cementing Europe’s leadership in next-generation automotive electronics and the broader software-defined-vehicle market.

To address this paradigmatic shift, the Rigoletto project will establish the foundation for a next-generation Automotive Hardware Platform based on the open RISC-V instruction set architecture (ISA), bolstering and securing Europe’s leading role in the automotive electronics industry. The project aligns with the high-level goal of EU Chips Joint Undertaking and the of the industry-led Vehicle of the Future initiative: namely, the creation of a RISC-V based automotive hardware platform strongly linked with the formation of an open, software-defined vehicle ecosystem led by European automotive manufacturers and suppliers. Rigoletto aims at developing RISC-V intellectual property (IP) components, including processor cores, accelerators, interconnects, memory hierarchy and peripheral subsystems. A wide range of performance profiles will be targeted for next-generation DCUs and ZCUs, to enable increasingly electrified, automated, and connected vehicles.

The RISC-V instruction set architecture (ISA) presents a unique and timely opportunity for European Integrated Device Manufacturers (IDM), Tier 1s and also automotive OEMs to build upon the flexibility and momentum of an open-source ISA, supported by a large global industrial community. Rigoletto will establish strong standardization and collaboration efforts, as necessary, to avoid fragmentation and duplication of work. Through the collaboratively developed reference platform approach spearheaded by the project, the partners will establish a strong innovation path in automotive electronics.

Grant Number: 101194371

This project is running from July 2025 - July 2028.

Consortium

• Infineon Technologies AG - DE (coordinator)
• IMEC - BE
• Robert Bosch GmbH - DE
• Continental - DE
• Eclipse Foundation - DE
• Vitesco Technologies GmbH - DE
• Cariad - DE
• UZL - Universität zu Lübeck - DE
• Karlsruhe Institute of Technology - DE
• TU München - DE
• NXP S - AT
• AVL List GmbH - AT
• SIEMENS AG OESTERREICH - AT
• Technische Universitaet Graz - AT
• Technische Universitaet Wien - AT
• Silicon Austria Labs (SAL) - AT
• Logiicdev eU - AT
• Pierer Innovation GmbH - AT
• STMicroelectronics srl - IT
• Sapienza University of Rome - IT
• University of Bologna - IT
• Politecnico di Torino - IT
• STMicroelectronics - FR
• Thales Research & Technology - FR
• … 72 partners