library IEEE;
use IEEE.STD_LOGIC_1164.ALL;



entity m_Kaffeemaschine is
    Port ( Fuellstand : in  STD_LOGIC;
           Verschluss : in  STD_LOGIC;
           Start : in  STD_LOGIC;
           Pad_ID : in  STD_LOGIC_VECTOR (1 downto 0);
           clk : in  STD_LOGIC;
           reset : in  STD_LOGIC;
		   led_enable : in STD_LOGIC;
           LED_out : out  STD_LOGIC_VECTOR (2 downto 0));
end m_Kaffeemaschine;

architecture Behavioral of m_Kaffeemaschine is


type zustand is (warte, Verschlussstand, ID_Test, Reinigen, Kaffee, Latte, Error, Fill);


signal z, z_next : zustand := warte;


signal led, led_next : STD_LOGIC_VECTOR(2 downto 0) := (others => '0');


signal delay_count : INTEGER range 0 to 59999 := 0; 

z <= z_next
delay_count <= delay_count
z_next <= Verschlussstand
z_next <= Fill
z <= warte