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Home » Archived » DSDP - Real-Time Software Components (RTSC) » Steps required for definition of non-cacheable section(Defining non-chached memory segment)
Steps required for definition of non-cacheable section [message #512501] Fri, 05 February 2010 10:14
Sujith  is currently offline Sujith Friend
Messages: 4
Registered: February 2010
Junior Member
Hi,

We require to have a memory section which is non-cacheable. We would use a custom manger that would carve out chuck from this and allocate.

I tired searching this forum and BIOS documentation (ti.sysbios.family.arm) but could not find solutions. Could you please help me?

Thanks,
Sujith
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